Recent Projects
A common barrier to leveraging the capabilities of reconfigurable computing is the design platform. We have been working closely with our clients and partners to explore the boundaries of PCIe capabilities. Bluespec's Electronic Design Automation (EDA) toolset significantly raises the level of abstraction for hardware design while retaining the ability to produce high-quality RTL without compromising speed, power or area. An ESL equally at home with data- and control-plane, Bluespec enables an accelerated new modeling, verification and implementation design capability.
Platform Blue
The AMD 790FX chipset supports up to four slots of Gen-2 x16 PCIe. This seems as good a platform as any to demonstrate IP interoperability. We're bringing up both the Altera and Xilinx PCIe dev kit boards. Out of the box we observed 1,600 MBytes/Sec with the x8 Gen-1.
Altera, Xilinx, and other Reconfigurable Logic
With both the Altera and Xilinx PCIe Dev Kits up and running, the task turns to working up repeatable measurement practice for both Latency and Throughput. Initially, we will measure to and from main memory (endpoint/root-complex); later we will measure (endpoint-endpoint). The mainboard chipset (AMD 790FX on this platform) has a lot to do with this - but by comparing various endpoint/root-complex observations, we will be able to deduce the individual contributions.
Resting Point
We've advanced the platform to a functional resting point where we've observed both Altera and Xilinx PCIe TLPs making their merry way to and from (790FX) main memory. We haven't taken the interesting next step of having them interact with each other endpoint-endpoint (and measuring that throughput and latency).
Hardware Components (excluding FPGA/PCIe boards):
HSPC Tech Station Open-Air Case, MSI K9A2 (AMD 790FX chipset) motherboard,
AMD Athlon64/5000+ Dual-Core CPU, EVGA/Nvidia GeForce 8800GT (512MB)
GPU, 4GB PC8500 System Memory, Enermax EMD625A 625W modular Power Supply,
Xigmatek 120mm CPU Cooler, Athena SATA 5-drive bay enclosure, 1x 750
GB System disk, 4x 500 GB RAID disks (2 TB Array), Promise raid controller,
Sony DVD/CD R/RW Reader/Burner, Planar 21" 1600x1200 LCD DVI monitor,
keyboard, mouse, cables.
ML555
We've been putting some miles on the Xilinx ML555 again. This PCIe development card has an LX50T and a surprisingly mature set of off-the-shelf apps. In specific, XAPP859 seems as good as any to quickly get up and running with PCIe.
ML605 in Gen2 PCIe Corei7 motherboard
Leona and Mike enjoy the 11.2 release of PlanAhead
Top of XUPV5
Secure Comms
AD9551/PCBZ Eval as ADC clock source
The all-important "S2" (dried thermal grease on SX95T)
"It's Not The Tools, It's the Language: The Effective
Depreciation of RTL through Bluespec SystemVerilog" —
Presentation
delivered by Atomic Rules Founder Shepard Siegel, November 2008, Northeastern
University.
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